Sierra Monolithics

Sierra Monolithics Unveils First 100G Mux and Demux Chipset, A Major Milestone in Industry’s Race to Meet Growing Network Traffic Demand

Devices are Targeted for Both 100G Ethernet and Long-Haul Transport Markets, Which are Experiencing Explosive Consumer and Enterprise Bandwidth Growth

March 16, 2009

REDONDO BEACH, CA -- Sierra Monolithics Inc.

Sierra Monolithics, a leading supplier of high-performance ICs and modules for high-speed analog and RF applications, today introduced the world’s first 100G multiplexer with clock multiplier unit (CMU) and demultiplexer with clock and data recovery (CDR). The first in a planned family of 100G solutions, the devices are key components for equipment used in both the short-reach data center and high-performance computing market, as well as long-haul and metro carrier networks that are carrying growing volumes of IPTV, Internet video, multimedia conferencing, HD programming, mobile video phones, on-line gaming, networked storage and other high-bandwidth transport payloads.

“Sierra Monolithics has built on the leadership foundation of our pioneering 40G family to deliver the industry’s first 100G MUX/CMU and CDR/DEMUX,” said Javed Patel, President and CEO of Sierra Monolithics. “This chipset will enable the development of 100G transponder modules and line cards that will relieve carriers’ increasingly congested network routes and significantly lower their transport costs per bit, while also increasing throughput in data center networks so they can support today’s exponentially growing demand for video, peer-to-peer and virtualization services.”

Sierra Monolithics’s Theta-100G solution includes the SMI10021 10:4 MUX/CMU and SMI10031 4:10 CDR/DEMUX devices. Each uses the same fourth-generation, 130-nanometer IBM 8HP bipolar complementary metal-oxide semiconductor (BiCMOS) silicon germanium (SiGe) process technology as the company’s recently introduced 40G solutions, enabling the lowest possible size, cost and power consumption. These devices are available in a surface mount BGA (Ball Grid Array) package. BiCMOS is a natural choice for 100G because it is well suited for fast transistor switching requirements where low noise is essential. Bipolar SiGE results in higher gain, higher frequency, and lower noise floor as compared to CMOS, allowing transmission systems to meet stringent eye quality parameters. The Theta-100G chipset operates at 4 x 25.0Gb/s to 28.3 Gb/s (100-113 Gb/s) and incorporates an integrated, dual-polarization quadrature phase-shift keying (DP-DQPSK) modulation precoder function that makes 100G networks extremely resistant to the type of impairments that are often encountered in older fiber.

The industry is currently finalizing standards for 100 Gbit/s data transmission, at the same time that 40G networks are moving into the general deployment phase, initially in router interconnect applications. A single 100G wavelength delivers ten times the bandwidth of today’s prevailing dense wavelength division multiplexing (DWDM) transport solutions -- enough to support 800,000 simultaneous Internet calls. 100G standards are also expected to provide a convergence point between transport and Ethernet networks, by uniting WANs using SONET/SDH/OTN standards with LANs using Ethernet.

“After years of delay, network operators finally are moving on a wide scale to deploy 40-Gbit/s DWDM in their networks,” said Sterling Perrin, senior analyst with Heavy Reading. “But even as 40G begins to take hold, carriers already are anticipating a migration to 100G. The market eagerly awaits new products from suppliers of 100G chips, components and systems that will make 100G technically and economically viable.”

Product Details

The Theta-100G chipset incorporates a 10x10.3Gb/s (MLD/CAUI) or 11x11.2Gb/s SFI-S interface on the client side, as well as a de-skew function in compliance with OIF SFI.S, plus a line side pre-skew function for the MLD/CAUI interface with a depth of 84UI. The inclusion of on-chip, selectable single- and dual-DQPSK precoding circuitry delivers high spectral efficiency, high optical signal-to-noise ratio sensitivity, and robustness against dispersion. The DQPSK precoding function is implemented with dual I/Q-interleaved outputs (4x28Gbps) for dual-polarized (DP-DQPSK) applications. The precoding function may also be configured to enable a single-pole 2x56Gb/s DQPSK modulation structure with a pair of external 2:1 multiplexers through use of the synchronous high-speed clocks which may be programmed to any desired clock-to-data skew.

Other features include on-chip industry-standard selectable phase detector on-chip dual-mode (PRWS) pattern generators and error checkers, and SPI control interfaces with clock rates to at least 150 MHz. Typical jitter swing is 3.7psec p-p typical, and the differential output level is 0.6 to 1.2V p-p. Power consumption is a low 4 Watts max with high-speed clock outputs disabled. The chipset will enable the development of 100G-capable line cards and transponders, and will support the 300-pin multisource agreement (MSA) pluggable module definition and, in the future, smaller form factors, as well.

The Theta-100G SMI10021 and SMI10031 devices will sample in second quarter 2009, and scheduled to enter volume production in the fourth quarter of 2009. They are packaged in a ball grid array (BGA).

About Sierra Monolithics

Sierra Monolithics, Inc. is a leading supplier of proven Analog and Mixed Signal IC solutions for Optical Communication, Wireless, and Microwave/Millimeter Wave applications. Founded in 1988, Sierra Monolithics has leveraged its mixed signal IC design and expertise in high-frequency aerospace and defense communications, to develop a variety of high performance Optical ICs, RFICs, and MMICs. Currently Sierra Monolithics designs and manufactures products for Broadband Wireless (WiMAX RFICs), Optical Communication (OC-768 SerDes), and Microwave/Millimeter Wave (C, I, J, Ku, and L band modules) markets.

Sierra Monolithics is privately held, and is headquartered in Redondo Beach, California. The venture-backed company's primary funding is from Storm Ventures and U.S. Venture Partners in Menlo Park, California. For more information on Sierra Monolithics, please visit www.monolithics.com, or call +1-310-698-1000.

CONTACT: Public Relations, Sierra Monolithics

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